EW: ROBOTICS
Figure 3. GPIO event capture with TI PHY
Additionally, TI SPE Ethernet PHYs integrate a suite of advanced features to further reduce humanoid design complexity and enhance system performance. Precise time synchronisation Leveraging precise time synchronisation can enhance a distributed humanoid robot system by enabling seamless and deterministic coordination across joints. TI’s SPE PHYs, a 1000BASE-T1 DP83TG721S-Q1 and a 100BASE-T1 DP83TC817S-Q1, integrate IEEE 802.1AS enabling precise network-wide time synchronisation with single time reference across controller and I/O nodes. This allows developers to offload timestamping from the processor onto the PHY, thereby achieving synchronisation accuracy as low as 1-15ns. Leveraging timestamping in SPE PHYs Ethernet PHYs integrating IEEE 802.1AS can improve real-time decision-making and adaptive behaviours of humanoid subsystems. Timestamping is the process of marking incoming and outgoing data or events with precise time information as data or event are generated or received. Timestamping can be implemented in
several locations on the data path as shown in Figure 2 – in the hardware of the Ethernet PHY, in the hardware of the MAC IP in the processor, or in the processor’s software. TI’s processors and Ethernet PHY portfolio can support all three types of timestamping. The accuracy and jitter of the clock data can vary from milliseconds to nanoseconds depending on the proximity of timestamp to the cable. Timestamping at the Ethernet PHY, the closest component to the cable, increases synchronisation precision by accounting for indeterministic latencies that occur as data passes through the PHY. GPIO event capture or generation Precise GPIO event timing capability further improves synchronisation across multiple motor controllers and is beneficial for tasks requiring detection and response coordination across subsystems. Both DP83TG721S-Q1 and DP83TC817S-Q1 have the capability to create Timestamps and Event Triggers in PHY hardware instead of the controller. The Ethernet PHY not only stores the time of the day with integrated IEEE 802.1AS, but can also use it to capture (Figure 3) or generate (Figure 4) events on its GPIO pins with nanosecond accuracy. Generated events can be in a form of a pattern, such as 25MHz-clock implementation, or in a form of pulses at specific times.
Figure 4. GPIO event generation with TI PHY
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