T&M: FPGA
extensive design knowledge about the target FPGA, as well as access to the complete toolchain. A strategy such as this can be very complex but requires minimal investment. A fully applica- tion-specific solution is ultimately produced. Another variation is the use of preconditioned IP access solutions. In this variant, a sort of IP kit from a system provider is used. The IP includes the pure instrument function and also the JTAG mapping. Also included are predefined access routines such as read and write procedures, e.g. based on TCL (Test Command Language). Using such commercially available solutions shortens the project development time. They also offer the charm of relatively manageable investments, although the licence costs for an IP can be really quite high. This is associated among other things with a volume license, which is often required. However, many process steps must be carried out manually in this variant. The third category is a complete system solution based on a framework with continuous process automation, such as ChipVORX by GÖPEL electronic. Here, analysers, configuration tools, and generators do virtually all the work of the design engineer and test engineer. This procedure is based on the board’s CAD data and an IP library. The IP is adapted to the target without manual intervention. Automatic test generators and diagnosis processors complete the system solution. The time it takes to create the project is typically a matter of minutes and the user does not need any special FPGA tools or design experience. As a result of the integration of ChipVORX into the system platform SYSTEM CASCON (1), it is also possible to mix FPGA-embedded instruments applications with other embedded board test procedures such as boundary scan, or processor emulation, without any problems.
Integrated ChipVORX tool suite
Figure 1. Architecture of SYSTEM CASCON with integrated embedded instruments tool suite
The joy of testing and programming Thanks to the level of automation of
FPGA-embedded instruments now available for board testing, recent years have seen a sharp increase in interest and the number of applications. According to Table 1, this is not just down to greater test coverage but also faster flash programming and improved options for validating embedded systems where physical access is no longer possible. The gain in test coverage is achieved in particular due to the higher speed of the instruments. This enables problems to be solved, such as the problems experience with boundary scanning as a result of the low vector repetition rate. This is particularly relevant for flash programming due to the increasingly vast volumes of data, but also for testing of new DDR-RAM types, because certain dynamic minimum requirements must be complied with here. FPGA-embedded instruments are therefore a perfect complement to the embedded Board Test via Boundary Scan. The situation looks a slightly different when it comes to Bit Error Rate Tests
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